High-resolution time measurement, engineered into silicon.
Harmonie Design Labs develops Time-to-Digital Converter architectures, TDC IP, and complete TDC-based integrated circuits for systems that depend on precise measurement of time intervals.
Our work extends beyond the TDC core. We support the complete measurement chain, including event detection, timing architecture, calibration, digital processing, interfaces, verification, and silicon validation.
Customers can engage us for a dedicated TDC block, a complete application-specific IC, or engineering support within an existing timing and measurement system.
- TDC architecture and feasibility assessment
- Application-specific timing architecture
- Custom and synthesizable TDC IP development
- High-resolution time interval measurement
- Multi-channel timing solutions
- Calibration and linearity correction
- Temperature and process compensation
- Digital processing and control integration
- TDC verification and performance analysis
- Silicon characterization and laboratory validation
From timing requirement to complete measurement architecture
A TDC project begins with the measurement problem, not with a predefined circuit.
Resolution, measurement range, event rate, channel count, dead time, power consumption, operating temperature, calibration strategy, and system interfaces all influence the appropriate architecture.
Harmonie Design Labs works with customer engineering teams to convert these requirements into a practical TDC-based solution. The objective is to develop a timing architecture that performs consistently within the conditions of the intended application.
Define the Measurement Requirements
We assess the events being measured, required resolution, measurement range, repetition rate, number of channels, operating environment, power targets, calibration needs, and system interfaces.These inputs define the architecture, technology requirements, verification strategy, and expected performance boundaries.
Design and Integrate the TDC
We develop the TDC architecture and integrate it with the required event-detection, calibration, control, processing, and communication functions.The design is evaluated across relevant process, voltage, and temperature conditions. Linearity, timing stability, measurement range, conversion behaviour, and digital integration are considered throughout development.
Characterize the Timing Performance
Following tape-out and first-silicon bring-up, the TDC is evaluated using controlled timing references and precision laboratory equipment.Measured performance is compared with the specification across the required operating conditions. Characterization may include resolution, accuracy, linearity, channel matching, temperature behaviour, power consumption, and calibration performance.
TDC IP, Complete ASIC, or System-Level Support
Harmonie Design Labs supports different levels of TDC development depending on the customer’s existing architecture and project stage.
TDC IP
A dedicated TDC block developed for integration into a broader ASIC or SoC.
The delivery may include the TDC design, integration documentation, verification environment, calibration requirements, and characterization data.
Complete TDC-Based ASIC
A full application-specific integrated circuit combining the TDC core with the functions required by the measurement system.
Depending on the application, this may include event detection, timing control, calibration, digital processing, memory, and communication interfaces.
System-Level Engineering
Technical support for customers developing a wider timing or measurement platform.
This may include architecture selection, performance budgeting, calibration strategy, temperature compensation, signal-processing considerations, and integration between the IC and the surrounding electronics.
Why Use a Custom TDC Solution?
Commercial timing components can address standard measurement requirements. A custom TDC becomes relevant when the system needs a specific combination of performance, integration, environmental capability, power consumption, or channel architecture.
The correct architecture depends on the complete system requirement. Resolution alone does not determine the quality of a TDC solution. Measurement range, linearity, stability, calibration, event rate, and operating conditions must be evaluated together.
Typical project drivers include:
- Timing requirements not supported by available components
- Integration of several measurement functions into one IC
- Application-specific calibration or compensation
- Operation across a defined temperature range
- Multi-channel or specialized event-measurement architecture
- Reduced component count and system complexity
- Improved control over product lifecycle and supply
- Differentiated timing performance within the final product
Applications
TDC-based solutions are used where a system determines distance, flow, position, speed, or another physical quantity by measuring the time between events.
Each application places different demands on the timing architecture. Optical, ultrasonic, industrial, and harsh-environment systems therefore require different approaches to event detection, calibration, measurement range, and compensation.
Typical application areas include:
- Time-of-Flight measurement
- Ultrasonic flow measurement
- Ultrasonic distance and level sensing
- Optical ranging systems
- Precision instrumentation
- Industrial measurement systems
- Sensor and transducer interfaces
- Particle and event detection
- High-temperature timing applications
- Custom timing and synchronization systems
Frequently asked questions
A Time-to-Digital Converter measures the time interval between defined events and converts that interval into a digital value. It is used in systems where physical information is derived from precise timing.
Yes. We can develop a dedicated TDC block for integration into an existing ASIC or SoC. The scope can include architecture, design, verification, integration support, and characterization.
Yes. We can integrate the TDC with the surrounding control, calibration, processing, and communication functions required by the application.
Achievable resolution depends on the semiconductor technology, architecture, measurement range, power target, operating environment, calibration strategy, and system-level noise. We define realistic performance targets during the feasibility stage.
The required approach depends on the architecture and application. It may include calibration, reference structures, digital correction, channel matching, temperature compensation, and characterization across process, voltage, and temperature conditions.
Yes. TDC-based architectures can be developed for elevated-temperature applications when the process technology, packaging, timing requirements, and operating profile support the intended performance.
Yes. We can review the existing architecture and contribute at TDC block, ASIC, firmware, calibration, or system level according to the project requirements.
